1. Field of the Invention
This invention is directed to a flip-flop circuit, in general, and to a high speed flip-flop circuit which is triggered by the leading edge of signals and operates on low amplitude, narrow width pulses to produce discernible output signals, in particular.
2. Prior Art
There are many instances known in the art wherein a flip-flop or similar triggered circuit is required to detect signals with small amplitude pulses and to convert these pulses into signals which can be detected with a degree of reliability and certainty at the output of the circuit. This situation is complicated if the pulses have a narrow width. These known circuits can be in the nature of flip-flops, one-shots or the like.
In the past, a typical circuit for producing this operation was a Fairchild circuit of the 100K series which operates on an ECL type of operation. These circuits have also been characterized as line drivers, line receivers or the like.
However, these circuits are generally limited in the speed of operation thereof inasmuch as the rise and fall times of the pulses require on the order of three to five nanoseconds. While this is a relatively short time, it is also a limitation on the operation of the circuits. That is, the throughput of the system is limited by the rise and fall time of pulses which can be detected.
In the known circuitry, the operating time is considered to be relatively slow when compared to many other high speed operations, for example in fiber optic systems which can operate at the rate of forty or fifty megabits per second. The rise or fall times for these pulses are far less than three to five nanoseconds. Consequently, the high speed optic (and other) signal transmission systems would not operate or function properly. Therefore, higher speed circuits are necessary.